Technical Program

Technical Program

April, 9th, 2024

High-Performance Audio
Chairman: Bram Nauta (University of Twente)

  • Mikkel Høverby (Consultant, Denmark)
    20 Years of Fully Integrated Class-D Audio
    With the 20-year anniversary of fully-integrated class-D audio amplification, the technical solution space is as diverse as ever. This paper reviews the first 20 years of class-D audio power amplifier chips and technology, and presents a number of market trends expected to drive the next 20 years of evolution. Where a simple 2-level switching power stage was originally the only choice, several multi-level topologies, each with distinct pros and cons, are now being employed in products. For digital-input applications, the original open-loop architectures required super-low phase noise clock sources, whereas modern devices apply techniques such as FIR-DACs to allow integrated low-power PLLs to be used. Many architectural refinements are driven by the growing market for battery-powered applications, where minimum idle power footprint per channel is highly valued due to the very low peak-to-average power level of typical audio signals. Also, with the ever-decreasing power footprint of digital signal processing, audio power amplification efficiency (predominantly determined by analog functionality) will become important in smaller and smaller applications, such as headphones, wearables and hearing aids. Finally, the parallel field of MEMS microphones is briefly reviewed, as a precursor for the recent industry trend of MEMS speakers, which will undoubtedly benefit from rethinking of the audio power amplifier solution.
  • Pedro Amaral (Infineon, Austria)
    High-Performance Capacitive MEMS-Based Microphones for Consumer Market Applications: Analog Design and System Considerations
    A brief review of microphone MEMS technologies developed at IFX is presented, followed by some basic results and tradeoffs of analog interfaces with these MEMS capacitive sensors. System level considerations with direct impact on analog/mixed-signal design choices are discussed, ex: Radio Frequency Interference, Shock Recovery, Infrasound and Ultrasound response. Some examples of both analog and digital microphone “systems” are shown, focusing in recent developments on VCO-ADC based digital microphones.
  • Daniel Schinkel (Axign/Monolithic Power Systems, The Netherlands)
    Mixed-Signal Amplifier Control
    The control of class-D amplifiers has seen many incarnations over the year. Originally, open-loop 'digital amplifiers' competed with solutions that used analog feedback loop around the power-stage. Once feedback had taken over - because of its better PSRR and linearity - a next step was to also include the LC output filter in the loop. This talk will discuss why for such loops digital control combined with a low-latency ADC in the feedback is a good idea. Digital control loops with 5th order loop-filters as well as 2nd order LC compensation filters can reach more than 60 dB of error suppression across the entire audio band. An implementation of a fully configurable digital controller in 55-nm technology requires only a tenth of the power used for the ADC, while the 10 mW ADC power is competitive with the power needed for solutions that use a DAC and an analog control loop.
  • Enrico Oberti (Inventvm, Italy)
    Ultra-Low Power Class-D Amplifiers for True Wireless Stereo (TWS) Applications
    TWS headphones have recently gained popularity and success. This new class of devices also sets new challenges for the driver IC. In fact, in wireless and battery powered systems, there is a tradeoff between audio quality and power consumption. While high fidelity performance, such as low noise and low THD, are desirable, the limited battery capacity requires ultra-low power solution to guarantee a reasonable battery life. In this scenario, filter-less class-D amplifiers become an interesting solution to overcome the efficiency limit of a class AB/G amplifier, which has been a widely adopted solution for headphone drivers in the past. Moreover, the increasing demand of high-performance active noise cancellation has created the need of ultra-low latency in the signal path that must be carefully designed. An overview of circuits, techniques and solutions is described in detail, to realize a DAC + class-D amplifier, suitable for TWS application. Particularly, all the relevant specifications, such as low noise level, low latency, THD and PSRR are addressed, with focus on low power solutions.
  • Huajun Zhang (TU Delft, The Netherlands)
    Capacitively Coupled Class-D Audio Amplifiers
    Class-D amplifiers (CDAs) typically employ a closed-loop configuration such that the switching output stage’s distortion and supply sensitivity are suppressed by the loop gain. However, their resistive feedback network contributes significant noise and limits their dynamic range. This talk introduces the use of capacitive feedback to enhance the CDAs’ dynamic range and its design considerations. As a prerequisite to capacitive feedback, the feedback-after-LC topology will also be discussed. Prototypes of analog- and digital-input CDAs implemented in a 180 nm BCD process achieved >120 dB of dynamic range and about −110 dB of THD+N.
  • Marco Berkhout (Goodix, The Netherlands)
    Smart Speaker Drivers
    A Smart Speaker Drivers is a combination of a class-D audio amplifier with a DC-DC boost converter that allows for high peak output power in battery operated applications such as mobile phones. To prevent damage due to excessive dissipation or membrane excursion, the impedance and temperature of the loudspeaker needs to be monitored continuously through accurate load current sensing. Furthermore, high power efficiency is required to extend battery life and flexibility in output power and noise is demanded to optimize performance in different use-cases. This paper explores innovative techniques that address these requirements in state-of-the-art Smart Speaker Drivers.

April, 10th, 2024

Biomedical and Wearable Applications
Chairman: Kofi Makinwa (TU Delft)

  • Giuseppe Bruno and Pasquale Biancolillo (STMicroelectronics, Italy)
    Wearable Devices for Vital Sign Monitoring
    A novel class of MEMS motion sensors has been introduced, which, apart from a MEMS sensing channel, also provide a so-called vertical analog front-end (AFE). This AFEs is designed to be easily integrated inside the MEMS sharing as much as possible common internal analogs and digitals functions. This functionality enables the fusion of data from these sensors with data from the motion channels, thus opening up completely new applications. These will benefit from the full synchronization of the AFE with the other MEMS sensing channels, as well as other on-chip resources such as the intelligent sensor processing unit (ISPU) and artificial intelligence (AI) algorithms. In this talk, the design of the vertical AFE will be presented.
  • Yun-Shiang Shu (MediaTek, Taiwan)
    Biopotential Sensing in Consumer Wearables with Dry Electrodes
    Advances in circuit and system design have enabled the acquisition of biopotentials such as ECGs by wearable consumer devices, but have also presented new challenges. For instance the dry electrodes used in watches and bands significantly degrade signal quality. This talk will begin by discussing the problems caused by the high impedance of such electrodes, which exacerbates issues such as power-line interference, motion artifacts, circuit noise. Subsequently, the circuit and system techniques used to achieve sufficiently high signal quality will be discussed.
  • Jiawei Xu (Fudan University, China)
    Multimodal Analog Front-End Circuits for Wearable Healthcare
    Simultaneous recordings of multiple physiological signals in a wearable form factor enables more easy and comprehensive assessment of one’s health condition. However, detecting low-amplitude, low-frequency physiological signals from multiple aggressors like noise, motion artifacts, and environmental interferences remains the great challenge in practice. This talk presents several recent examples of biopotential, bioimpedance and optical interface circuits, with focus on analog circuits techniques to optimize noise, input impedance, input dynamic range, and power consumption for wearable scenarios.
  • Dante Muratore (TU Delft, The Netherlands)
    Implantable Electronics for a High-Fidelity Artificial Retina
    Electronic interfaces to the retina represent an exciting opportunity to restore or even enhance vision. Although proof of principle devices have been demonstrated, they provide limited visual function. This is because they only provide coarse control over the targeted neural circuitry and fail to respect its cellular and cell-type specificity. To achieve better results, future devices should be able to control a large population of neurons with cellular resolution. In this talk, I will present the design of a wireless bi-directional neural interface and discuss on the circuit and system challenges associated with the design of its implantable electronics.
  • Nick van Helleputte (imec, Belgium)
    Sensing Electro-Chemical Signals with CMOS
    Precise measurement of specific chemical and biological analyte concentrations is crucial in many healthcare and biomanufacturing applications. Electro-chemical sensing techniques offer an appealing solution, particularly when low-cost, miniaturization, and real-time monitoring are required. pH and ion-sensitive sensors, seamlessly integrated on standard CMOS platforms, have proven valuable, with Ion-Sensitive Field-Effect Transistor (ISFET) arrays playing a pivotal role in, for example, DNA sequencing. For next-generation DNA sequencing and proteomics, innovative nanopore-based solutions are being explored for high-throughput molecular sensing. This presentation will cover the fundamentals of electro-chemical sensing, focusing on the analog circuit design techniques. An overview of state-of-the-art circuit design techniques relevant to ISFET-based sensors will be presented. To conclude, the talk will address specific circuit design challenges for nanopore-based molecular sensing.
  • Drew Hall (University of California at San Diego, USA)
    CMOS Chips for Single-Molecule Biosensing
    Molecular electronics involves the use of single molecules as functional circuit elements. This talk describes the first CMOS molecular electronics chip. It consists of a 16k array of 25 nm long alpha-helical peptides, which can be engineered to detect interactions with specific target molecules. These interactions cause millisecond-scale, picoampere current pulses, which are detected by an on-chip current monitor. Unlike classical biosensors, which measure ensemble averages, the resulting biosensor provides direct, real-time observation of single-molecule interaction kinetics. This biosensor represents a first step in the application of molecular chips in biological research, diagnostics, sequencing, proteomics, drug discovery, and environmental monitoring.

April, 11th, 2024

High-Voltage Analog
Chairman: Andrea Baschirotto (University of Milano-Bicocca)

  • Davide Giacomini (Infineon Technologies, Italy)
    The Magic of High Voltage Technologies in the Development of Analog Integrated Circuits for Applications up to 1200 V
    This presentation will show to the audience the latest advancements in the monolithic high voltage technologies used to build gate driver and sensor devices for applications in high voltage environment, such as motor drivers, converters, power supplies and class D Audio amplifiers. The evident advantage of these technologies lies in the fact of allowing different blocks of low voltage analog circuits to work and communicate across a wide common mode voltage, up to 1200 V, in a millimetric piece of silicon. This enables the realization of single or multichannel solutions in small packages and even the integration with switches in a single device (IPMs). Details on the proposed technology and challenges will be given during the presentation, as well as a short preview on the latest achievements to match the new challenges in terms of negative undervoltage and fast dV/dt, posed by the recent adoption of Wide Bandgap switches.
  • Jef Thone and Nick van Houtven (MindCet, Belgium)
    Design Techniques for WBG Transistor Adoption in HV Power Conversion
    The power electronics industry is rapidly moving towards wide bandgap (WBG) based power convertors. The specific properties of these WBG materials allow these convertors to operate at higher voltage (300 V – 1200 V), switching speeds (0.5 – 2 MHz), efficiency and power density compared to their Silicon transistor based counterparts. It has been shown that driving the WBG power transistors is no trivial task. Their high switching speeds combined with high voltage conversion leads to large dV/dt transients. This hinders the driving circuits’ performance and complicates their design. At the same time, high voltage power conversion often includes the need for galvanic isolation between the high and low voltage domains. These problems limit the adoption of WBG transistors in markets where high reliability is necessary. Meaning that there is a need for specific circuits and design techniques to drive these transistors and to incorporate protection mechanisms to prevent fault or destruction. Therefore, to maximally realize their potential and ensure reliable operation, specific analog design techniques need to be applied. In this paper different design techniques for key building blocks in a power convertor will be discussed:
    - Gate driver integrated circuits with multi-voltage level output to allow for more reliably mitigating parasitic-turn on.
    - Integrated overcurrent detection with sub-100 ns turn-off time in an overcurrent situation.
    - High voltage (isolated) level shifting circuits and their sensitivity to charge injection, common mode currents and bus-voltage ringing.
    - Isolated high-side gate driver power supply for use in high frequency, high voltage power conversion.
    - High voltage analog sensing circuits for current and voltage sensing on the high-side domain.
  • Bernhard Wicht (Hannover University, Germany)
    Chip-Scale High-Voltage Power Supplies
    This talk presents research on miniaturized power supplies using high-voltage IC technologies that run from the 110/230 V mains supply or high-voltage DC sources in the range of 400V to power various low-voltage subsystems. The talk gives an overview of solutions on system and circuit levels for integrated chip-scale power supplies supporting miniaturization and decentralization of increasingly complex systems. Applications include sensor nodes, transmitters, receivers, and actuators with supply voltages of 3-10 V at power levels of 500 mW and below. Various miniaturized high-voltage converters will be presented, including an isolated active-clamp flyback converter and non-isolated and isolated buck converters. One innovation on the system level is voltage-interval-based constant-on-time control. With this approach, a buck converter supports an input range of 12.5-400 V, achieving a power density of 752 mW/cm3 and a peak efficiency of 84%. On the circuit level, a high-speed, low-power HV threshold-detection circuit reduces sensing losses by more than 1000× compared to conventionally used resistive voltage dividers. The implemented AC-DC converter benefits from an active zero-crossing buffer, enabling an approximately 240× smaller capacitance and on-chip integration up to 50 mW. It achieves a power density of 458 mW/cm3 and a measured AC peak efficiency of 73.7%.
  • Stefen Heinen (RWTH Aachen University, Germany)
    Smart High-Voltage Integrated Circuits
    The transformation to sustainable energy sources requires advances and an increase of the integration level in power conversion systems. Programmability and adaptive control algorithms are key in improving the efficiency and reducing EMI for future commercial solutions using wide bandgap power devices. Applications ranging from smart gate drivers over power point tracking ICs to monolithically integrated converters in an emerging GaN-technology will be discussed.
  • Ruida Yun (Analog Devices, USA)
    Introduction to High-Voltage Isolation Technology, from Process Development to Circuit Design
    Galvanic isolation is a popular way of breaking ground loops in noisy, high voltage environments in various applications where ground currents can disrupt data transmission, damage equipment, and even hurt human operators. CMOS digital isolators, built using integrated transformers or capacitors that couple RF EM fields across thin-film insulation materials, have gained popularity over optocouplers due to their advantages in latency, power, timing accuracy, and size. CMOS compatible process must be carefully engineered to withstand >20 kVpk surge events to protect operators, and the circuit that enables the communication across the barrier must be immune to >150 kV/µS Common Mode Transients (CMT) to enable next generation gate driver technology. This talk will introduce the high voltage isolation technology, where process and circuit are developed together to deliver the best-in-class isolation performance. Various design trade-offs will be examined, and a compact design will be presented to show how to achieve the best performance yet with the highest channel density in the industry.
  • Marco Grassi (University of Pavia, Italy)
    High-Voltage SC DC-DC Converters for High-Efficiency at Light-Load Power Supplies
    This presentation shows the advantages of Switched-Capacitor DC-DC power converters in the strong reduction of vampire currents drawn by from power supplies when load is lite or idle. Particular focus is given to the research and development of an SOI-SJ-based high-voltage first stage architecture and technology upgraded to be compliant with up to 400 V DC line input, reporting customized voltage ratios step-down solutions. The cascade of capacitive stages operated in different voltage domains, followed by an optional low voltage transformer insulated termination enables this approach to be employed in consumer applications either for domestic and driving assistance or infotainment in automotive applications.
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AACD 2024 Schedule